- Synplify DSP

- DesignWare System-Level Library

- DesignWare Interface & Standards IP

- VirtualPlatform
- Innovator

- Confirma

- CHIPit
- System Studio
- DSP Model Libraries
- Saber

- DesignWare Library/ Star IP
- DesignWare Verification IP
- DesignWare Embedded IP
- DesignWare System-Level Library
- IP Reuse Tools
- IP Vertical Markets

- Liberty NCX
- PrimeTime
- PrimeTime SI
- PrimeTime PX
- PrimeTime VX
- PrimeRail
- NanoTime
- Star-RCXT
- TetraMAX ATPG
- Hercules

- DC Ultra
- Power Compiler
- DFT Compiler
- DFT MAX
- BSD Compiler
- DesignWare Library

- IC Compiler

- Galaxy Custom Designer SE

- Galaxy Custom Designer LE

- HSIM
- HSPICE
- NanoSim
- SpiceExplorer
- WaveView Analyzer
- XAオプション

- Hercules
- PrimeYield

- Identify
- Identify Pro

- Synplify Pro

- Synplify Premier

- Pioneer-NTB
- Leda
- MVRC
- MVSIM
- VCS
- Magellan
- Vera
- ESP
- Formality
- Confirma
- CHIPit

- OpenVera
- SystemC
- SystemVerilog
- VMM

- Proteus
- SiVL
- PSM Check& Create
- IC Workbench Plus

- CATS

- Process Simulation
- Device Simulation
- Interconnect Simulation
- Framework
- Structure Editor
- TCAD for Manufacturing
- Calibration & Service
- Electrical Variability Analysis

- Yield Explorer
- Odyssey Yield Management System
- Recipe Manager& Editor

Tool & Methodology / Deployment
- Flow Optimization
- Implementation
- Verification Consulting
- Pilot Design Emvironment
- System-Level Modeling